Version RC0 Values: B Per-loop holding for flagbyte - B register because it's bit addressable, unlike R(x). R3 Per-loop holding for S0BUF byte 0xFDAE Flagbyte Memory Address FDAE BITS: 0: Request Logging 1: Request ACK from drive cycle logging routine 2: Keep logging enabled across drive cycles 3: Request for pre-start OBD-II -- Abandon listener routine until next drivecycle (drivecycle routine clears bit) 4: Inspection Mode -- Like pre-start OBD-II, but the drivecycle routine won't clear the flag, so listener is disable until power cycle. 5: XRAM dump - Dump the next byte and loop ----- ; Get Flagbyte to B register 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte E0 MOVX A, @DPTR ; Get byte to ACC F5 F0 MOV B, A ; Move to B ; Handle inspection mode -- Like pre-start OBD-II but the drivecycle routine doesn't clear the flag ; Have to power reset the ECU to get out of this. 30 F4 01 JNB B.4 +1 ; Not in inspection mode, skip over return 22 RET ; Handle pre-start OBD-II request - Abandon ship if this is set. 30 F3 01 JNB B.3 +1 ; Pre-start OBD-II not requested, skip over return 22 RET ; Persistent logging: make sure it sticks 30 F2 0A JNB B.2 +10 ; Skip this if B.2 persistent logging is not set. D2 F0 SETB B.0 ; Enable logging C2 F1 CLR B.1 ; Log ack -- Drivetime listener will set this - for consistency. E5 F0 MOV A, B 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte F0 MOVX @DPTR, A ; Update XRAM flagbyte ; B.5 indicates we're doing an SRAM dump -- Get the byte, dump it, and bail 30 F5 5C JNB B.5 +92 ; Get DPL/DPH from XRAM to R4/R5 90 FD AF MOV DPTR, #0xFDAF ; DPL E0 MOV A, @DPTR FC MOV R4, A 90 FD B0 MOV DPTR, #0xFDB0 ; DPH E0 MOV A, @DPTR FD MOV R5, A ; Increment R4 and R5, checking for carry 74 01 MOV A, #1 ; For addition 2C ADD A, R4 ; Add DPL to A -- DPL +1 FC MOV R4, A ; Update DPL 50 12 JNC +18 ; If DPL didn't roll, we can just jump to sending the byte 74 01 MOV A, #1 ; For addition 2D ADD A, R5 ; Add DPH to A -- DPH +1 FD MOV R5, A ; Update DPH 50 0C JNC +12 ; If DPH didn't roll either, we can just send the byte ; DPL/DPH rolled, we hit FFFF, bail C2 F5 CLR B.5 ; DPH rolled, we are done, clear the XRAM dumping bit E5 F0 MOV A, B 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte F0 MOVX @DPTR, A ; Update XRAM flagbyte 75 98 50 MOV S0CON, #0x50 ; Serial Mode1, REN0 Enabled 22 RET ; Just bail ; Update memory with the new DPTR first 90 FD AF MOV DPTR, #0xFDAF ; DPL XRAM EC MOV A, R4 F0 MOVX @DPTR, A ; Update XRAM 90 FD B0 MOV DPTR, #0xFDB0 ; DPH XRAM ED MOV A, R5 F0 MOVX @DPTR, A ; Update XRAM 8C 82 MOV DPL, R4 ; Update DPTR 8D 83 MOV DPH, R5 ; Update DPTR ; Init Serial Port 75 AA FC MOV S0RELL, 0xFC ; vvv 75 BA 03 MOV S0RELH, 0x3 ; S0REL = 0x3FC -- 125000 baud with SMOD set 43 98 40 ORL S0CON, 0x40 ; Set bit SM1 53 98 6F ANL S0CON, 0x6F ; Clear bit SM0 - Ensure Mode 1 8Bit UART, Disable REN C2 AC CLR IEN0.4 ; Turn off serial interrupt ; Dump byte, DPTR value first E5 83 MOV A, DPH ; Get the byte to send F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI E5 82 MOV A, DPL ; Get the byte to send F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI E0 MOV A, @DPTR ; Get the byte to send F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI 75 98 40 MOV S0CON, #0x40 ; Serial Mode1, REN0 Disabled (we'll turn it back on when we're done dumping) 22 RET ; Just bail ; END of XRAM dumper ; The running routine sets B.1 when it logs so we can distinguish drive cycles. ; If this is the first loop of pre-start after a drive cycle, clear bits 0 (log enable) and 1 (log ack) ; This allows us to distinguish drive cycles. ; But first, check if B.2 is set, indicating we want to persist across drivecycles 20 F2 0C JB B.2, +12 ; B.2 Persistent logging set, jump over this routine 30 F1 09 JNB B.1, +9 ; B.1 is not set, jump over this routine 53 F0 FC ANL B, #0xFC ; Clear B.0 and B.1 E5 F0 MOV A, B 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte F0 MOVX @DPTR, A ; Update memory ; Init Serial Port 75 AA FC MOV S0RELL, 0xFC ; vvv 75 BA 03 MOV S0RELH, 0x3 ; S0REL = 0x3FC -- 125000 baud with SMOD set 43 98 50 ORL S0CON, 0x50 ; Set bits SM1 and REN0 53 98 7F ANL S0CON, 0x7F ; Clear bit SM0 - Ensure Mode 1 8Bit UART 43 87 80 ORL PCON, #0x80 ; set PCON0.7 (SMOD), bitrate doubler 43 D8 80 ORL ADCON0, #0x80 ; Set ADCON0.7 (BD), enable baud rate generator C2 AC CLR IEN0.4 ; Turn off serial interrupt ; Check for pending input E5 98 MOV A, S0CON 20 E0 04 JB ACC.0, +4 ; Got input, step over return ; No input, set Mode1 + REN0 and return 75 98 50 MOV S0CON, #0x50 ; Bits SM1 and REN0 22 RET ; Get S0BUF and send "R" to ack input E5 99 MOV A, S0BUF ; MOV received byte to ACC FB MOV R3, A ; Store received byte in R3 53 98 EE ANL S0CON, #0xEE ; Clear RI0 and REN0 75 99 52 MOV S0BUF, #0x52 ; Send R 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Check for incoming "l" to enable logging BB 6C 11 CJNE R3, #0x6C, +17 ; Compare to "l" 75 F0 01 MOV B, #1 ; Set bit 0 only E5 F0 MOV A, B 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte F0 MOVX @DPTR, A ; Update XRAM flagbyte ; Send l to ack 75 99 6C MOV S0BUF, #0x6C ; Send "l" 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Check for incoming "L" to enable persistent logging BB 4C 11 CJNE R3, #0x4C, +17 ; Compare to "L" 75 F0 05 MOV B, #5 ; Set bits 0, 2, request with persistence E5 F0 MOV A, B 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte F0 MOVX @DPTR, A ; Update XRAM flagbyte ; Send l to ack 75 99 4C MOV S0BUF, #0x4C ; Send "L" 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Check for incoming "d" to disable logging BB 64 11 CJNE R3, #0x64, +17 ; Compare to "d" 75 F0 00 MOV B, #0 ; Set bit 0 only E5 F0 MOV A, B 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte F0 MOVX @DPTR, A ; Update XRAM flagbyte ; Send d to ack 75 99 64 MOV S0BUF, #0x64 ; Send "d" 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Setup for XRAM dump BB 78 21 CJNE R3, #0x78, +33 ; Compare to "x" 75 F0 20 MOV B, #20 ; Set bit 5 only E5 F0 MOV A, B 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte F0 MOVX @DPTR, A ; Update XRAM flagbyte 90 FD AF MOV DPTR, #0xFDAF ; Update DPL in XRAM 74 FF MOV A, #FF F0 MOVX @DPTR, A 90 FD B0 MOV DPTR, #0xFDB0 ; Update DPH in XRAM 74 F7 MOV A, #F7 F0 MOVX @DPTR, A ; Send X to ack and bail with REN0 off - Next time into this loop, we'll start dumping 75 99 58 MOV S0BUF, #0x78 ; Send "x" 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI 75 98 40 MOV S0CON, #0x40 ; Serial Mode1, REN0 Disabled (we'll turn it back on when we're done dumping) 22 RET ; Just bail ; Check for incoming "P" to dump port SFRs BB 70 3F CJNE R3, #0x70, +63 ; Compare to "p" E5 80 MOV A, P0 F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI E5 90 MOV A, P1 F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI E5 A0 MOV A, P2 F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI E5 B0 MOV A, P3 F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI E5 E8 MOV A, P4 F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI E5 F8 MOV A, P5 F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI E5 FA MOV A, P6 F5 99 MOV S0BUF, A ; Send Byte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Check for incoming "o" to enable pre-start OBD-II BB 6F 1E CJNE R3, #0x6F, +30 ; Compare to "o" 75 F0 08 MOV B, #8 ; bit 3, prestart OBDII - everything else cleared. E5 F0 MOV A, B 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte F0 MOVX @DPTR, A ; Update XRAM flagbyte ; Send "O" 75 99 4F MOV S0BUF, #0x4F ; Send O 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Reapply the settings found in the RESET routine used to initally configure the serial port 75 98 90 MOV S0CON, #0x90 75 BA 03 MOV S0RELH, #3 75 AA CC MOV S0RELL, #0xCC 53 87 7F ANL PCON, #7F 22 RET ; Check for incoming "!" to enable "inspection mode" ; This basically disables the listener until power reset BB 21 1E CJNE R3, #0x6F, +30 ; Compare to "!" 75 F0 10 MOV B, #0x10 ; B.4, inspection mode - everything else cleared. E5 F0 MOV A, B 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte F0 MOVX @DPTR, A ; Update XRAM flagbyte ; Send "I" 75 99 4F MOV S0BUF, #0x49 ; Send O 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Reapply the settings found in the RESET routine used to initally configure the serial port 75 98 90 MOV S0CON, #0x90 75 BA 03 MOV S0RELH, #3 75 AA CC MOV S0RELL, #0xCC 53 87 7F ANL PCON, #7F 22 RET ; Send current state ; This gets the current flagbyte, adds 41h to it, and outputs it. ; 41h is ascii "A" -- so if the byte was 3, it would output a single "D". This is mainly for debugging/confirmation. E5 F0 MOV A, B ; Flagbyte to A 24 41 ADD A, #0x41 ; 0x41 ASCII "A" F5 99 MOV S0BUF, A ; Send flagbyte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Exit routine, ends here 75 98 50 MOV S0CON, #0x50 ; Serial Mode1, REN0 Enabled 22 RET Bytes: 90 FD AE E0 F5 F0 30 F4 01 22 30 F3 01 22 30 F2 0A D2 F0 C2 F1 E5 F0 90 FD AE F0 30 F5 5C 90 FD AF E0 FC 90 FD B0 E0 FD 74 01 2C FC 50 12 74 01 2D FD 50 0C C2 F5 E5 F0 90 FD AE F0 75 98 50 22 90 FD AF EC F0 90 FD B0 ED F0 8C 82 8D 83 75 AA FC 75 BA 03 43 98 40 53 98 6F C2 AC E5 83 F5 99 30 99 FD C2 99 E5 82 F5 99 30 99 FD C2 99 E0 F5 99 30 99 FD C2 99 75 98 40 22 20 F2 0C 30 F1 09 53 F0 FC E5 F0 90 FD AE F0 75 AA FC 75 BA 03 43 98 50 53 98 7F 43 87 80 43 D8 80 C2 AC E5 98 20 E0 04 75 98 50 22 E5 99 FB 53 98 EE 75 99 52 30 99 FD C2 99 BB 6C 11 75 F0 01 E5 F0 90 FD AE F0 75 99 6C 30 99 FD C2 99 BB 4C 11 75 F0 05 E5 F0 90 FD AE F0 75 99 4C 30 99 FD C2 99 BB 64 11 75 F0 00 E5 F0 90 FD AE F0 75 99 64 30 99 FD C2 99 BB 78 21 75 F0 20 E5 F0 90 FD AE F0 90 FD AF 74 FF F0 90 FD B0 74 F7 F0 75 99 58 30 99 FD C2 99 75 98 40 22 BB 70 3F E5 80 F5 99 30 99 FD C2 99 E5 90 F5 99 30 99 FD C2 99 E5 A0 F5 99 30 99 FD C2 99 E5 B0 F5 99 30 99 FD C2 99 E5 E8 F5 99 30 99 FD C2 99 E5 F8 F5 99 30 99 FD C2 99 E5 FA F5 99 30 99 FD C2 99 BB 6F 1E 75 F0 08 E5 F0 90 FD AE F0 75 99 4F 30 99 FD C2 99 75 98 90 75 BA 03 75 AA CC 53 87 7F 22 BB 21 1E 75 F0 10 E5 F0 90 FD AE F0 75 99 4F 30 99 FD C2 99 75 98 90 75 BA 03 75 AA CC 53 87 7F 22 E5 F0 24 41 F5 99 30 99 FD C2 99 75 98 50 22