Values: B Per-loop holding for flagbyte - B register because it's bit addressable, unlike R(x). R3 Per-loop holding for S0BUF byte 0xFDAE Flagbyte Memory Address ----- ; Get Flagbyte to B register 90 FD AE MOV DPTR, #0xFDAE ; Logging Flagbyte E0 MOVX A, @DPTR ; Get byte to ACC F5 F0 MOV B, A ; Move to B ; Handle pre-start OBD-II request - Abandon ship if this is set. 30 F3 01 JNB B.3 +1 ; Pre-start OBD-II Requested 22 RET ; The running routine sets B.1 when it logs so we can distinguish drive cycles. ; If this is the first loop of pre-start after a drive cycle, clear out the flagbyte. ; This allows us to distinguish drive cycles. Also clear the log enable bit. ; But first, check if B.2 is set, indicating we want keep logging enabled. 20 F2 09 JB B.2, +9 ; Persistent logging enable 30 F1 06 JNB B.1, +6 ; Jump over this if B.1 is not set 53 F0 FC ANL B, #0xFC ; Clear bits 0 and 1 E5 F0 MOV A, B F0 MOVX @DPTR, A ; Update memory ; Init Serial Port 75 AA FC MOV S0RELL, 0xFC ; vvv 75 BA 03 MOV S0RELH, 0x3 ; S0REL = 0x3FC -- 125000 baud with SMOD set 43 98 50 ORL S0CON, 0x50 ; Set bits SM1 and REN0 53 98 7F ANL S0CON, 0x7F ; Clear bit SM0 - Ensure Mode 1 8Bit UART 43 87 80 ORL PCON, #0x80 ; set PCON0.7 (SMOD), bitrate doubler 43 D8 80 ORL ADCON0, #0x80 ; Set ADCON0.7 (BD), enable baud rate generator C2 AC CLR IEN0.4 ; Turn off serial interrupt ; Check for pending input E5 98 MOV A, S0CON 30 E0 59 JNB ACC.0, +115 ; No input E5 99 MOV A, S0BUF ; MOV received byte to ACC FB MOV R3, A ; Store received byte in R3 53 98 EE ANL S0CON, #0xEE ; Clear RI0 and REN0 ; Send "R" to ack input 75 99 52 MOV S0BUF, #0x52 ; Send R 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; 14bytes ; Check for incoming "l" to enable logging BB 6C 0E CJNE R3, #0x6C, +14 ; Compare to "l" 75 F0 01 MOV B, #1 ; Set bit 0 only E5 F0 MOV A, B F0 MOVX @DPTR, A ; Update XRAM flagbyte ; Send l to ack 75 99 6C MOV S0BUF, #0x6C ; Send "L" 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; 31 bytes ; Check for incoming "L" to enable persistent logging BB 4C 0E CJNE R3, #0x4C, +14 ; Compare to "L" 75 F0 05 MOV B, #5 ; Set bits 0, 2, request with persistence E5 F0 MOV A, B F0 MOVX @DPTR, A ; Update XRAM flagbyte ; Send l to ack 75 99 4C MOV S0BUF, #0x4C ; Send "L" 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; 48 bytes ; Check for incoming "o" to enable pre-start OBD-II ; This will cause this routine to abort until after the drive cycle logging routine clears the bit ; This means we don't have to do this more than once in a no-start condition unless we remove +12v to the ECU BB 6F 1B CJNE R3, #0x6F, +26 ; Compare to "o" 75 F0 08 MOV B, #8 ; bit 2, prestart OBDII E5 F0 MOV A, B F0 MOVX @DPTR, A ; Update XRAM flagbyte ; Send "OBD" 75 99 4F MOV S0BUF, #0x4F ; Send O 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Reapply the settings found in the RESET routine used to initally configure the serial port 75 98 90 MOV S0CON, #0x90 75 BA 03 MOV S0RELH, #3 75 AA CC MOV S0RELL, #0xCC 53 87 7F ANL PCON, #7F 22 RET ; 78 bytes ; Send current state ; This gets the current flagbyte, adds 41h to it, and outputs it. ; 41h is ascii "A" -- so if the byte was 3, it would output a single "D". This is mainly for debugging/confirmation. E5 F0 MOV A, B ; Flagbyte to A 24 41 ADD A, #0x41 ; 0x41 ASCII "A" F5 99 MOV S0BUF, A ; Send flagbyte 30 99 FD JNB S0CON.1, $ ; Wait on S0CON.TI to be set: transmit has completed C2 99 CLR S0CON.1 ; Clear S0CON.TI ; Re-enable receive in Mode 1, clear all other flags ; 89 bytes 75 98 50 MOV S0CON, #0x50 ; Bits SM1 and REN0 22 RET Bytes: 90 FD AE E0 F5 F0 30 F3 01 22 20 F2 09 30 F1 06 53 F0 FC E5 F0 F0 75 AA FC 75 BA 03 43 98 50 53 98 7F 43 87 80 43 D8 80 C2 AC E5 98 30 E0 59 E5 99 FB 53 98 EE 75 99 52 30 99 FD C2 99 BB 6C 0E 75 F0 01 E5 F0 F0 75 99 6C 30 99 FD C2 99 BB 4C 0E 75 F0 05 E5 F0 F0 75 99 4C 30 99 FD C2 99 BB 6F 1B 75 F0 08 E5 F0 F0 75 99 4F 30 99 FD C2 99 75 98 90 75 BA 03 75 AA CC 53 87 7F 22 E5 F0 24 41 F5 99 30 99 FD C2 99 75 98 50 22 FDAE BITS: 0: Request Logging 1: Request ACK from drive cycle logging routine 2: Keep logging enabled across drive cycles 3: Request for pre-start OBD-II Remember to: Set flagbyte bit 2 from drive cycle routine! - TODO: keybyte "m" to initiate XRAM dump -- loop incrementing DPTR over F800 to FFFF and outputing to serial